The invention relates to a sigma-delta analog-to-digital converter for converting an analog input signal into a digital output signal, comprising in a signal processing loop:
means for providing a difference signal in response to the analog input signal and an analog feedback signal;
means for filtering the difference signal and for providing a filtered difference signal;
means for sampling and quantizing the filtered difference signal and having an output for providing the digital output signal;
a digital-to-analog converter for converting the digital output signal to the analog feedback signal; and
a return-to-zero switch included in the signal processing loop.
Such a sigma-delta analog-to-digital converter is known, for example, from European Patent Application No. 0 495 328. This known sigma-delta analog-to-digital converter has a return-to-zero switch in its feedback branch to reduce the non-linearity caused by the digital-to-analog converter in the feedback branch. The rising and falling edges of the output signal generated by the digital-to-analog converter have non-zero rise and fall times. In the case that the input code of the digital-to-analog converter does not change, the output signal of the digital-to-analog converter remains constant during the clock period. In the case that the input code does change, the output signal of the digital-to-analog converter changes from one level to another level. Due to the non-zero rise or fall times the net signal content in that clock period is different from that in a clock period with no input code change. The net signal content per clock period thus depends on the code, which is a non-linear effect causing inter-symbol interference and thus distortion. The return-to-zero switch in the feedback branch reduces this effect by excluding the output signal portions of the digital-to-analog converter during the transitions from the one level to the other level. However, this return-to-zero switching also changes the frequency spectrum of the analog feedback signal, which results in a low frequency gain change and thus a gain error.
It is an object of the invention to provide a sigma-delta analog-to-digital converter with an improved gain accuracy. To this end, the sigma-delta analog-to-digital converter as defined in the opening paragraph is characterized in that the return-to-zero switch is arranged between an output of the means for providing the difference signal and an input of the means for filtering the difference signal.
By arranging the return-to-zero switch before the means for filtering the open-loop gain is reduced by the return-to-zero action, but the closed-loop gain is hardly affected, as long as the remaining open-loop gain is sufficiently large, which is the case in practice. In this way the gain accuracy is restored.
In a preferred embodiment the analog input signal and the analog feedback signal are converted to currents by means of voltage-to-current converters. In this way the difference signal is obtained by a simply interconnecting of the outputs of the voltage-to-current converters. The digital-to-analog converter may have differential outputs and the voltage-to-current converters may have differential inputs and outputs to improve the performance of the sigma-delta analog-to-digital converter.